HPSFPGAbridge

[Altera_Forum]

Hi,  

So, I'm using De1SOC kit with DE1soc VNC viewer VNC (from terasic). The default kernel is 3.18 , and i require an uvc input. I have tried compiled few time but ran into errors. Thus, i switch to compile kernel 4.1.22 ltsi. It has uvc driver enabled. The problem is acl driver. I compiled the driver together with the kernel and dtb file. It's fine when i run init_opencl.sh (i move my new compiled acl driver into the directory). Aocl version and aocl diagnose shows no error. However, when i try to program the FPGA using aocx file ( aocl program /dev/acl0 helloworld.aocx ) i have the following error:  sh: 1: cannot create /sys/class/fpga-bridge/fpga2hps/enable: Directory nonexistent sh: 1: cannot create /sys/class/fpga-bridge/hps2fpga/enable: Directory nonexistent sh: 1: cannot create /sys/class/fpga-bridge/lwhps2fpga/enable: Directory nonexistent sh: 1: cannot create /sys/class/fpga-bridge/fpga2hps/enable: Directory nonexistent sh: 1: cannot create /sys/class/fpga-bridge/hps2fpga/enable: Directory nonexistent sh: 1: cannot create /sys/class/fpga-bridge/lwhps2fpga/enable: Directory nonexistent Couldn't open FPGA status from /sys/class/fpga/fpga0/status!  which is weird, given the dmeg shows the bridges are registered  altera_hps2fpga_bridge ff400000.fpga-bridge: enabling bridge altera_hps2fpga_bridge ff400000.fpga-bridge: fpga bridge registered altera_hps2fpga_bridge ff500000.fpga-bridge: enabling bridge altera_hps2fpga_bridge ff500000.fpga-bridge: fpga bridge registered altera_hps2fpga_bridge ff600000.fpga-bridge: enabling bridge altera_hps2fpga_bridge ff600000.fpga-bridge: fpga bridge registered altera_fpga2sdram_bridge soc:fpga2sdram-bridge: fpga bridge registered altera_fpga2sdram_bridge soc:fpga2sdram-bridge: driver initialized with handoff 000001ff  Again i try to valid if the bridge is enabled  root@de1soclinux:~# cat /sys/class/fpga_bridge/*/state enabled enabled enabled enabled root@de1soclinux:~# ls /sys/class/fpga_bridge br0 br1 br2 br3 root@de1soclinux:~# ls /sys/class/fpga_bridge/br0 device name of_node power state subsystem uevent