Community
cancel
Showing results for 
Search instead for 
Did you mean: 
Altera_Forum
Honored Contributor I
767 Views

Hardware run result does no match with simulation

Hello all,I am working on an OpenCL project for acceleration of image convolution (with max pooling). It produced correct output matrix in simulation, but when I put it in hardware run, the first 2 row of the output matrix did not match with the correct one but the rest did. I understand that the reasons in account for the difference of the results between simulation and hardware run can be 1) kernel channels 2) memory synchronization. However I won't have memory synchronization problem because the the kernels I used are task kernels. And I also made sure the number of channel reads equals to channel write.Could anyone give advice on the reason that may cause this problem?Any advice would be greatly appreciated!Lancer Chiang

0 Kudos
2 Replies
Altera_Forum
Honored Contributor I
35 Views

 

--- Quote Start ---  

Hello all, 

 

I am working on an OpenCL project for acceleration of image convolution. It produced correct output matrix in simulation, but when I put it in hardware run, the first 2 row of the output matrix did not match with the correct one but the rest did. I understand that the reasons in account for the difference of the results between simulation and hardware run can be 1) kernel channels 2) memory synchronization. However I won't have memory synchronization problem because the the kernels I used are task kernels. And I also made sure the number of channel reads equals to channel write. 

Could anyone give advice on the reason that may cause this problem? 

 

Any advice would be greatly appreciated! 

 

Lancer Chiang 

--- Quote End ---  

 

 

a third possibility is that convolution at the edges requires care in setting the values of non existing kernel elements outside image. This could be to do with the way such values are set or latched. They could be zeros in simulation but repeated pixels at edges in hardware. Normally this affects all edges around for half depth of kernel.
Altera_Forum
Honored Contributor I
35 Views

Thanks for your kindly reply! My edge was properly handled with zero padding :)

Reply