Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
17251 Discussions

Help generating 65Mhz on DE2-115 Cyclone IV E in verilog

Altera_Forum
Honored Contributor II
‎02-19-2015 10:11 AM
1,385 Views

Hi, currently we have a FPGA project that will use VGA port and monitor. We are using altera DE2-115 Cyclone IV E board but the clock output is only 50Mhz..  

Because we dont have a monitor to support lower resolution our best choice is to use 1024x768 resolution with 65Mhz pixel clock the problem is the board clock only generates 50Mhz signal. So how can we generate 65Mhz clock signal? Thanks in advance.
0 Kudos

Link Copied

1 Reply
Altera_Forum
Honored Contributor II
‎02-19-2015 10:27 AM
673 Views

Use a PLL, as available on the chip.

0 Kudos
Copy link
Reply

Community support is provided Monday to Friday. Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.