I have an NCO based on the equation "desiredFreq = controlword * Clockfrq / 2 power bitwidth of accumulator"
or "controlword = desired freq * 2 power bitwidth / clockfreq"
However when running it appears to run at 1/4 desired freq. When I multiplied the control word by 4 it appears to run the correct rate. This was based on several examples I found. So what exactly is the correct relationship of the control word, accumulator bit width and clock frequency?
module NCO(reset, sysclk, sampleclk, code_freq_ctl, other outputs);
input reset;
input sysclk;
input sampleclk;
input code_freq_ctl;
reg accum_sum; //30bit
reg accum_reg; //29bit
wire chip_advance;
always @ (posedge sysclk) //50MHz main clock
begin
accum_reg <= accum_sum;
code_phase <= accum_reg;
accum_sum <= accum_reg + code_freq_ctl;
end
always @ (posedge sampleclk) //from freq divider 5MHz readable 1 sysclk cycle, timed on 10th sysclk cycle
begin
//on sampleclk check value of chip_advance, do other functions if ==1
end
assign chip_advance = accum_sum;
endmodule
