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I have a custom component set that expose Avalon-ST sink & source interfaces to a channel. The channel does not support flow-control (a simple byte syncronous transfer). I would like to convince SOPC builder to 'involve' an Avalon-ST Idle Inserter at the ingress of this channel and an Avalon-ST Idle Remover at the egress.
The Idle Inserter & Remover are 'internal' components set_module_property INTERNAL true which I have surmised to mean that some magic in SOPC builder decides when to use them and I cannot just go pick them from the component library. I have run out of guess on exactly what magic incantation I need to speak over SOPC builder to get it to play along. I am, of course, quite capable of just lifting the component into my verilog code and being done with this odyssey. But there must be some 'intended' use for these components and I would like to understand that before I just go hacking & slashing. I have learned tons from this forum and hope to learn tons more by asking these sorts of questions. Thanks, DaveLink Copied
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I never did figure this out and I went for the fast & easy solution: A custom component that instantiates the (either) inserter or remover by including a .qip file in my component that has a global assignment to reference the original source.
set_global_assignment -name VERILOG_FILE [file join $::quartus(ip_rootpath) altera/sopc_builder_ip/altera_avalon_st_idle_inserter/altera_avalon_st_idle_inserter.v] Oh well. March forward.
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