How can I improve jtag to avalon master bridge write speeds through system console?

[ee60001]

I am currently using system console to write to various PIO addresses of varying width and I am seeing that it takes system console ~3ms to write to a single mm address before it can start the write to another. 

I am writing to different addresses and there isn't always a consistent sequence of addresses so I don't think I can just use the Avalon ST. What is the best way I can improve my write speed to the FPGA?

[SyafieqS]

Hi Sean,

Can you show me how did you see the time result? Any snapshot would be good

[ee60001]

I just take the number of ticks between commands.

master_write_8  $c_path $a 0x05

set t1 [expr [clock microseconds]]

master_write_32 $c_path $b $addr

set t2 [expr [clock microseconds]]

master_write_32 $c_path $c 0x00000000

set t3 [expr [clock microseconds]]

master_write_8  $c_path $d 0x0001

set t4 [expr [clock microseconds]]

master_write_8  $c_path $e 0x0000

set t5 [expr [clock microseconds]]

puts "[expr $t2-$t1]us"

puts "[expr $t3-$t2]us"

puts "[expr $t4-$t3]us"

puts "[expr $t5-$t4]us"

[SyafieqS]

Hi Sean,

Noted. Unfortunately there is no method to speed up the system console.