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How do I instantiate a PLL in Quartus II 5.0?
I want to generate an output which is an inversion of the clock. In other words, I want it to be phase-shifted by 180 degrees. Can I do this with a PLL, and if so, how?Link Copied
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Use the MegaWizard (under Tools menu) to generate the PLL. Yes, you can specify a 180 phase shift on the PLL output and then drive this out of the FPGA.

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