How to connect LAN91C111 in Qsys?

[Altera_Forum]

Hi all, 

I got confused about connecting LAN91C111 controller in Qsys.  I use the Generic Tri-State Controller in Qsys, and choose the LAN91C111 Interface preset.  The problem is the clk interface of the LAN91C111 controller. Because the frequency of the clock that Nios used is 100MHz, but the frequency of the clock of the LAN91C111 chip is 50MHz; should I use the Avalon-MM Clock Crossing Bridge, or add an Avalon ALTPLL into Qsys, and connect the Avalon ALTPLL and LAN91C111 controller?  Regards, feng

[Altera_Forum]

It has been ages since I have used the LAN91C111 but I'm pretty sure it uses async timing between it and the FPGA. So the MAC/PHY chip might operate on a 50MHz clock but the interface you are connecting does not. What is important is that you specify the timing relationship in terms of real time and not clock cycles so that the generic tri-state controller can drive the off-chip signals appropriately. So lets say the LAN91C111 needs a setup, hold, wait of 40ns, 20ns, 30ns and you ran the interface at 100MHz then the generic tri-state controller would drive the interface using 4T, 2T, 3T clock cycles (T = 10ns). If you select the correct LAN91C111 preset this should be done for you.

[Altera_Forum]

Thanks for your reply, BadOmen. 

 Can you give me some references? I read the <Embeddded Peripherals IP User Guide>, and found nothing about LAN91C111.  Regards, feng

[Altera_Forum]

Sorry, I don't know of any designs that have been ported to Qsys that use the Lan91c111 MAC/PHY. That chip is pretty old and hasn't been on embedded dev kits from Altera for years. I recommend looking for the datasheet for that device and double checking it against the settings in the generic tristate controller after you apply the 91c111 present. Also make sure in that controller that it has a software attribute that identifies it as an ethernet device.

[Altera_Forum]

Thanks, BadOmen. 

 I'll try it.  Regards, feng