How to connect different buses in quartus block schematics?

[Div1]

Hi,

I am new to altera, I have one TestBUSA[17..0] and a block which takes 20bit input Test_data[19..0], is there a way to assign this TestBUSA[17..10] to Test_data[15..8] and remaining inputs of Test_data to GND. I don't know how to do this, in xilinx it could be simply acheived by writing net name as  L,L,L,L,TestBUSA[15..8],L,L,L,L,L,L,L,L. Is there something similar in altera.

[RichardTanSY_Altera]

I recommend using HDL (Verilog or VHDL) instead of schematics for your design.

Schematic entry is not scalable — once the design grows, it becomes very difficult to manage, modify, and debug. HDL offers better readability, reusability, and portability across different tools and projects.

If you still need to use schematic symbols in your project, you can write the module in HDL first and then go to:

File → Create/Update → Create Symbol Files for Current File

This way you get the flexibility of HDL while still being able to instantiate it as a schematic block if required.

You may checkout this third-party video on how to use the bus tool in Quartus schematic:
https://www.youtube.com/watch?v=Pv5ONXK2bY8

Regards,

Richard Tan

[RichardTanSY_Altera]

Dropping a note to ask if my last reply was helpful to you. 

Do you need any further assistance from my side? 

Regards,

Richard Tan

[RichardTanSY_Altera]

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