How to convert CPLD pin assignment from Allegro Design Entry CIS to Quartus II

[Altera_Forum]

Hello,  

 I am using Altera MAX V device. I already have a schematic completed in Allegro Design Entry CIS (.dsn file) with the CPLD signals assignment. My question is there a automated method to transfer all those signal pins assignment in schematic .dsn file into Quartus II for writting CPLD code?  Through Pin Planner/Pin Assignment in Quartus software, I would need to manually key in each and every signals pin. This is time consuming and more prompt to human error.  Please help.  Thanks AnthonyT

[Altera_Forum]

I'm not aware of an 'automated' method. However, I suggest you write yourself a script (in Python, for example) to take the data from the .dsn file and directly create the required entries for you Quartus project. The CPLD pinout information is captured in the .qsf (Quartus Settings File) for your project. Simply make your script create entries, one line per signal/pin. E.g. 

set_location_assignment PIN_A15 -to your_signal  Automating it that way will take the error out of the process.  Cheers, Alex

[Altera_Forum]

Hello Alex, 

 Thanks for your advise. I have not learn about Python programming before and now starting to look at it. Do you mind to share a sample of the Python script that you mentioned?  I would like to "reverse engineering". :)  Thanks AnthonyT

[Altera_Forum]

I don't have a script to do this, just feel it's (probably) possible. 

 Post a relevant sample .dsn file and I'll have a look...  Cheers, Alex