Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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How to disable quartusII synthesis optimization?

Altera_Forum
Honored Contributor II
‎05-05-2012 12:50 PM
2,265 Views

Dear all 

How tell to synthesis tool not to combine multiple instant of same module?  

I want to use 2 instant of one module in my design, but synthesizer shared resource and removes some LUTs.
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AEsqu
Novice
‎01-28-2019 10:45 AM
1,449 Views

You may try with this in the qsf:

set_global_assignment -name PRE_MAPPING_RESYNTHESIS OFF

set_global_assignment -name REMOVE_REDUNDANT_LOGIC_CELLS OFF

set_global_assignment -name REMOVE_DUPLICATE_REGISTERS OFF

 

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For more complete information about compiler optimizations, see our Optimization Notice.