Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
17255 Discussions

How to infer rounding and/or saturation into a DSP block

Altera_Forum
Honored Contributor II
‎05-26-2010 03:36 PM
1,805 Views

Hi, 

 

I'm inferring most of my filters/equations in DSP blocks from HDL code, which works good. I would like to know if it is possible to infer rounding and/or saturation in the First/Second Round/Saturate stage of the Stratix III DSP block. I did not found any recommended HDL coding style for this part. Does anyone here know how I could do it? 

 

 

Tool: Quartus II 9.1 SP1 

Device: Stratix III (but I think all DSP blocks of the Stratix family are the same?)
0 Kudos

Link Copied

1 Reply
Altera_Forum
Honored Contributor II
‎05-26-2010 08:23 PM
988 Views

i don't think you can infer rounding/saturation in dsp blocks.

0 Kudos
Copy link
Reply

Community support is provided Monday to Friday. Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.