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Altera_Forum
Honored Contributor I
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IOPLL feedback delay chain

Hi guys 

 

I recently got this error in my projects where the fit says "critical warning (19166): for iopll "pll_inst", feedback delay chain setting was reduced from "703" to "381" to keep the iopll stable". 

 

I know that it's not recommended to have delay chain in the user design, but this seems to be added by Quartus IOPLL IP. 

 

Can anybody explain what "feedback" means here? Is this related to the feedback clock of the PLL? 

 

What does "to keep the iopll stable" mean? If those delays affects the PLL stability , why including them in IP from the start? 

 

Please excuse my poor understanding. 

 

Thanks 

Kais
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