Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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Inconsistent post-map Fmax

Altera_Forum
Honored Contributor II
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Hi 

 

When I run a design through GUI, STA reported a Fmax of 680 MHz for a post-map netlist. When I ran the same design through command line, STA reported an Fmax of 86 MHz. 

 

commands are: 

quartus_map --64bit system_dp_256_script.qsf 

quartus_sta --64bit system_dp_256_script --post_map --do_report_timing --sdc=system_dp_256_script.sdc  

 

Post-map resources are same in the both the cases. If I try running STA on post-fit netlist, Fmax reported in the flows are consistent. Am I missing any arguments in command-line mode? 

 

Regards
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Altera_Forum
Honored Contributor II
388 Views

Did anyone else face similar problem? 

 

Regards
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