Is this Code Mealy or Moore?

[Altera_Forum]

I found this code for a sequence detector on the internet, but I'm confused as to whether it's a mealy or moore circuit, because my instructor gave me a different example of a mealy code. Thanks, Mike

[Altera_Forum]

Yes it is a mealy state machine.Because output z depends on both Present State and input x. In case of moore state machine output depends only on Present State.

[Altera_Forum]

Thanks for your quick reply. Two more questions: 

What is a registered output? How can you tell how much latency there is?  Thanks, Mike

[Altera_Forum]

--- Quote Start ---   What is a registered output?   --- Quote End ---    Basically, if flip flop or register (more than one flip flop) is used to store the output it is called registered output.In case of your pdf,output z is not registered,it is combinatorial.     --- Quote Start ---   How can you tell how much latency there is?   --- Quote End ---    Latency can be calculated by number of clock cycle require to transfer input to output.In case of your pdf, if we consider next_state is input and state is output(This is for example only.Because these two signals are not the part of IO port ) then there will be a latency of 1 to reach the value of next_state to state signal.

[Altera_Forum]

Would you mind giving me an example of a registered output? 

 Thanks a lot, Mike

[Altera_Forum]

--- Quote Start ---  Would you mind giving me an example of a registered output?  Thanks a lot, Mike  --- Quote End ---    just get Z out into a separate process and put clock edge statement. By the way I am just curious why design it the hard way. If it is me I will just do this:  --clocked process shift <= shift(2 downto 0) & data; -- z <= '1' when shift = "0110" else '0';  The shift register keeps history of previous inputs instead of state machine. in your second process many of your z assignments are not needed. You can just use default z <= '0' at top then update in last state.

[Altera_Forum]

The requirements for this assignment are to use a mealy machine with registered output and one clock latency. Also, I have to detect two different 12 bit sequences. The first 10 bits are identical for both sequences and the last two are different. Then the result displayed on a 7 segment display. 

 Thanks for your help, Mike