JIC file creation for CFI Flash

[Altera_Forum]

A similar question was asked not too long ago for a EPCS device. Here is my hardware configuration: 

 CycloneII (with Nios) and MaxII sharing parallel CFI Flash (256MB) addr/data bus. MaxII contains PLF (parallel flash loader) design and will configure CycloneII using 1-bit passive serial. The Flash is designed to be partitioned to have a default HW image (pg0 - 0x1900000) and a user defined HW image (pg1 - 0x1C80000), similarly a default SW image (pg0 - 0x0) and user defined SW image (pg1 0x07E0000). The MaxII is setup by default to configure the FPGA from the default location stored in Flash. Once the HW image is loaded, I believe the SW image gets copied from Flash (NIOS memory mapped to 0x0) and stored into SDRAM (NIOS memory mapped to 0x02000000).   The part i'm trying to get working is actually programming the flash. Right now I just want to get the default HW and SW images programed into flash by means of JTAG connected to CycloneII. Using the Quartus programming tool to load the factory default PFL into the CycloneII to write to CFI Flash. The files i'm starting with are .SOF (HW) and .ELF (SW). This is where i'm stuck, how do I get these files into the correct format to input into the "Convert Programming Files" tool to create my JIC output?   I tried using these SDK shell commands to create a .hex file, but the 2nd command is giving me "interleave must be positive" errors:   elf2flash --base=0x0 --end=0x7DFFFF --reset=0x02000000 --boot=boot_loader_cfi.srec --input=sw.elf --output=sw.flash   nios2-elf-objcopy –input-target srec –output-target ihex sw.flash sw.hex   Thanks, Andy

[Altera_Forum]

See this: 

 http://www.altera.com/literature/an/an386.pdf?gsa_pos=1&wt.oss_r=1&wt.oss=parallel%20flash%20loader  Also note that the faster mechanism for programming the flash is via the NIOS processor rather than using the PFL.  Jake

[Altera_Forum]

I have read and followed appnote 386 in the design of our MaxII load. I'm confused about the creation of the flash POF and how to get both the HW and SW into the single POF. 

 Also, I need to use this method rather than on the go NIOS programing due to complying with a technical and manufacturing process.

[Altera_Forum]

Creation of the flash POF: 

 1. Launch the Convert Programming Files utility in Quartus II (File/Convert Programming Files...).  Setting up the Output programming file parameters:  2. Select Programmer Object File (.pof) option as Programming file type.  3. Select CFI_xxxMB as Configuration device, and passive serial as Mode.  4. Click on Options and set the Option bit address to 0x1FF0000  5. Change the File name to whatever you like (e.g. 512MB_flash.pof)  Setting up the Input files:  By default, you will see here the Options (Start address equal to the value you set in step 5), and one SOF Data in Page_0 and with start address <auto>.  6. Select the SOF Data of Page_0. On the right side, you should click on Properties. Change the Address mode for selected pages to Block and set the start and end addresses to 0x0 and 0x3FFFFF. This is what I used. You can also select Start or Auto. Click on OK.  7. Select Page_0 again, and click on Add File ... Choose the SOF file you have to store in Page 0. Once you are back to the main window, you should see that SOF Data of Page 0 points to the file you have just selected.  8. (Optional) If you want to add more pages, click on Add Sof Data and repeat steps 7 and 8. Make sure you set the right addresses for the pages. I found in the reference manual some hints about the recommended page mapping. According to that document: Page_0 0x00000000 - 0x003FFFFF Page_1 0x00400000 - 0x007FFFFF Page_2 0x00800000 - 0x00BFFFFF Page_3 0x00C00000 - 0x00FFFFFF Page_4 0x01000000 - 0x013FFFFF Page_5 0x01400000 - 0x017FFFFF Page_6 0x01800000 - 0x01BFFFFF Page_7 0x01C00000 - 0x01FFFFFF (this overlaps with the option bits, so I am not so sure)  9. Once you are done, click on Generate to create the POF file.