JTAG prgramming is not working in my Cyclone 4 based board.

[Altera_Forum]

Hi all,  

I'm new to this forum. I have one issue in my Cyclone 4 (EP4CE6E22C8N) based development board.. Please provide some basic tips.  FYI: TDI, TMS pins of the JTAG connector always LOW (even I have pulled up by 10K resistor), I belive, it should not be LOW..   Please share your solution .  Thanks in advance.. ABCD

[Altera_Forum]

hi all, 

FYI: the nSTASUS and CONFIG_DONE both are also in LOW state..  Thanks and regards

[Altera_Forum]

Assuming you have nothing connected to your JTAG header TMS and TDI should be high courtesy of the pull-ups you mentioned. 

 CONF_DONE remains low until the FPGA is configured. The fact that nSTATUS is low implies that nCONFIG is being driven low - which it needs to be prior to programming in Passive Serial configuration. Otherwise it too should be pulled/driven high.  Further info in configuration and remote system upgrades in cyclone iv devices (http://www.altera.com/literature/hb/cyclone-iv/cyiv-51008.pdf). Look at Figure 8-16 on page 8-36.  If you need further help let us know which dev board you're using...  Happy New Year, Alex

[Altera_Forum]

--- Quote Start ---  Assuming you have nothing connected to your JTAG header TMS and TDI should be high courtesy of the pull-ups you mentioned.  CONF_DONE remains low until the FPGA is configured. The fact that nSTATUS is low implies that nCONFIG is being driven low - which it needs to be prior to programming in Passive Serial configuration. Otherwise it too should be pulled/driven high.  Further info in configuration and remote system upgrades in cyclone iv devices (http://www.altera.com/literature/hb/cyclone-iv/cyiv-51008.pdf). Look at Figure 8-16 on page 8-36.  If you need further help let us know which dev board you're using...  Happy New Year, Alex  --- Quote End ---    HI Alex,   Thanks for your replay and information, "Assuming you have nothing connected to your JTAG header TMS and TDI should be high courtesy of the pull-ups you mentioned." - If JTAG header connected with USB blaster, the voltage level of TCK, TDI, TMS are 2.11V. (I'm using 3.3v IO supply).. I believe its loading with ground.  "CONF_DONE remains low until the FPGA is configured. The fact that nSTATUS is low implies that nCONFIG is being driven low - which it needs to be prior to programming in Passive Serial configuration. Otherwise it too should be pulled/driven high." - in this circuit NnCONFIG already pulled high through 10K Resistor.  If I tried to program is will be failed. if I tried to auto detect the device means "It thrown an error " Unable to scan device chain, Cant scan JTAG chain, do you want to open the JATG debugger to troubel shoot the JTAG chain?  FYI: I didn't install any serial device in this board..  Thanks and regards