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JBorr6
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Loop unrolling doesn't improve the processing time of radix-4 butterfly

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I am running an emulation of an FFT using aocl 19.1.0.240 with s10_gh1e1_4Dx2 board.

 

But when I tried comparing the radix-4 butterfly with (#pragma unroll before the for loop) and without loop unrolling, there is no difference in their processing time. Can anyone help me with this? Thank you so much.

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Hi,

 

I am unsure what the causes might be, we do have a tutorial on usage of loop unroll below:

https://software.intel.com/content/www/us/en/develop/documentation/oneapi-fpga-optimization-guide/to...

https://github.com/intel/BaseKit-code-samples/blob/master/FPGATutorials/FPGAExtensions/LoopAttribute...

 

You could try the example, and if the problem persists  let me know.

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121 Views

Hi,

 

I am unsure what the causes might be, we do have a tutorial on usage of loop unroll below:

https://software.intel.com/content/www/us/en/develop/documentation/oneapi-fpga-optimization-guide/to...

https://github.com/intel/BaseKit-code-samples/blob/master/FPGATutorials/FPGAExtensions/LoopAttribute...

 

You could try the example, and if the problem persists  let me know.

View solution in original post

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