MAX 10 BSD file question

[dmardian]

I am currently using the MAX 10 (10M02SCU169A7G). I have been tasked with creating some sort of self tests for the FPGA and seems like what I am looking for is a boundary scan test. I created the attached .bsd file but I can't really find any documentation on what to do with it or how to perform the scan?

I have a Aurix micro-processor that controls the FPGA. We have access to the JTAG enable pin along with the TMS/TCK/TDI/TDO pins. We also have the configuration pins.

Any help on how to perform these would be much appreciated. 

[NurAiman_M_Intel]

Hi,

Thank you for contacting Intel community.

Kindly refer to below BSDL support page for further information:

https://www.intel.com/content/www/us/en/programmable/support/support-resources/download/board-layout-test/bsdl/bsdl.html

https://www.intel.com/content/www/us/en/programmable/support/support-resources/download/board-layout-test/bsdl/max-10.html

Regards,

Aiman

[NurAiman_M_Intel]

We do not receive any response from you to the previous answer that I have provided. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.