I am currently using the MAX 10 (10M02SCU169A7G). I have been tasked with creating some sort of self tests for the FPGA and seems like what I am looking for is a boundary scan test. I created the attached .bsd file but I can't really find any documentation on what to do with it or how to perform the scan?
I have a Aurix micro-processor that controls the FPGA. We have access to the JTAG enable pin along with the TMS/TCK/TDI/TDO pins. We also have the configuration pins.
Any help on how to perform these would be much appreciated.
Thank you for contacting Intel community.
Kindly refer to below BSDL support page for further information:
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