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Max 10 GPIO lite ip

m_kumar
New Contributor I
251 Views

Hi

in my project using max10 fpga i configued as a GPIO lite ip as an ddr input path, and quartus software automatically add that ip into project, now i need to edit the ip parameters, Problem is when i tried to open the ip it was showing path not available.

err.PNG

0 Kudos
1 Solution
AminT_Intel
Employee
197 Views

Hello,

 

No need. I think the problem you are facing is the missing file in your Quartus. Please try this workaround from this link: https://www.intel.com/content/altera-www/global/en_us/index/support/support-resources/knowledge-base... 

That's the solution for PLL but you can do the same in your case.

 

Thanks

View solution in original post

6 Replies
AminT_Intel
Employee
233 Views

Hello Kumar,

 

I am sorry you are facing this issue. May I get your version of Quartus and your device OPN? 

 

Thank you

m_kumar
New Contributor I
225 Views

Hi

My Quartus version is 20.1 and it is lite edition and MAX10 FPGA.

Thanks.

AminT_Intel
Employee
213 Views

Hello,

 

Would you be able to share your sample design file?

 

Thanks

m_kumar
New Contributor I
210 Views

Hi.

You asking me to send IP file or project file.

 

AminT_Intel
Employee
198 Views

Hello,

 

No need. I think the problem you are facing is the missing file in your Quartus. Please try this workaround from this link: https://www.intel.com/content/altera-www/global/en_us/index/support/support-resources/knowledge-base... 

That's the solution for PLL but you can do the same in your case.

 

Thanks

AminT_Intel
Employee
171 Views

I’m glad that your question has been addressed, I now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.

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