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Measuring an LVDS output signal?

Altera_Forum
Honored Contributor II
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Hello all! 

 

I am still relatively new to verilog design, and am looking for some help. I have an ALTDIDO megafunction that creates a 16-bit DDR bus that I feed to an output port. I am looking to measure just one of these pins (just the positive, for instance) by feeding it to an SMA port I can connect to an oscilloscope, but I cannot figure out how. I tried to solve this a few different ways. I apologize, as these are all probably pretty novice ways of going about it, so I would love any help you can provide. The bus is called: 

lvds_tx_port_p. The complimentary pins are automatically created by the fitter. Moving on: 

 

  1. If I connect the SMA output directly to one of the pins on the bus, I get an error message about breaking fan-out rules for DIDO_OUT. It would unevenly load down that one pin, but it won't be in the final design, so I don't mind. I just want to measure it. This is the code, and the corresponding error: 

    assign sync3_clk = lvds_tx_port_p; 

    Error (15887): Output port "DATAOUT" of DDIO_OUT WYSIWYG "ALTDDIO_TX:ALTDDIO_TX_inst|altddio_out:ALTDDIO_OUT_component|ddio_out_emj:auto_generated|ddio_outa" has invalid signal-splitter fan-outs.  

  2. My next thought was to connect that one pin to a buffer or inverter, so as to not load down that pin as much. This however, gives me an error about that pin needing to be pseudo-differential, instead of the I/O specification I was using. This is clearly not an option- I don't want one pin on a different output standard than the rest. Here is the code, and the error: 

    assign sync3_clk = ~lvds_tx_port_p; 

    Error (176670): Pin "lvds_tx_port_p" requires a pseudo-differential I/O assignment.  

  3. My other idea was to feed the ALTDIDO function into a 16-bit wide buffer, tap the pin I want to measure to the SMA port, and feed the 16-bits into another buffer before output. I figured then I would not be trying to fan-out too much from the ALTDIDO function, and perhaps I would avoid the problem of a pseudo-differential signal by putting in a buffer. This approach did not work, either. I don't have the code/error, as I have since deleted it in efforts to try other approaches. 

 

 

I have a picture below to help illustrate my problem. 

 

https://www.alteraforum.com/forum/attachment.php?attachmentid=9249  

I'm hoping someone can help me fix this issue! Thank you for your time.
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Altera_Forum
Honored Contributor II
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ALTDDIO_OUT is usually implemented in dedicated DDR output registers. In this case, no fanout is possible. You can duplicate the DDR output register for the respective bit.

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