Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
Announcements
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.
15466 Discussions

Mistake in Incremental Block-Based Compilation in the Intel Quartus® Prime Pro Software on Youtube

FSaee4
Beginner
173 Views

This is a 3 part series for training on using incremental compilation in Intel Quartus prime pro. I am posting the links for 2nd and 3rd video.

https://www.youtube.com/watch?v=z3NkazzAp0k

https://www.youtube.com/watch?v=z3NkazzAp0k

If you look closely, 2nd video has been posted twice i.e under the description of 3rd part actually 2nd part is posted again. I really need the 3rd part of the training to learn about timing closure techniques. If somebody can upload the correct video that would be great.

0 Kudos
1 Reply
Kenny_Tan
Moderator
111 Views
Reply