Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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ModelSim - Force statement in testbench

Altera_Forum
Honored Contributor II
1,570 Views

How can I force a node in the vhdl code during simulation. 

 

tried this in test bench, no luck, get unknown identifier. 

 

nc_force ("I1:mode1", '1'); 

 

I can do i manually in the modelsim window: 

force -freeze I1\mode1 1 

 

I would prefer have the command in the testbench file
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Altera_Forum
Honored Contributor II
805 Views

nc_force is a Cadence specific library function 

I don't think it is supported in ModelSim 

In ModelSim, it has its own version of nc_force 

Look up signal_spy in ModelSim manual
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Altera_Forum
Honored Contributor II
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thanks thanks thanks, (done to satisfy min message requirements)

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