Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
17049 Discussions

ModelSim + for loop generation + nonresolved signal has multiple sources error

Altera_Forum
Honored Contributor II
2,198 Views

Hello All,  

 

I am trying to compile the following code in modelsim and getting "nonresolved signal RX_CH_A has multiple sources. 

 

-- In process 1 for i in 0 to 5 loop RX_CH_A(11 - 2*i) <= PA(6 - i); RX_CH_B(11 - 2*i) <= PB(6 - i); RX_CH_C(11 - 2*i) <= PC(6 - i); RX_CH_D(11 - 2*i) <= PD(6 - i); end loop; -- In process 2 for i in 0 to 5 loop RX_CH_A(10 - 2*i) <= NA(6 - i); RX_CH_B(10 - 2*i) <= NB(6 - i); RX_CH_C(10 - 2*i) <= NC(6 - i); RX_CH_D(10 - 2*i) <= ND(6 - i); end loop;  

 

Since process1 uses odd bits and process2 uses even bits, there should not be a "multiple source" error. 

 

Quartus compiles and synthesises the code just fine. 

 

Only modelsim reports this error. 

 

Any help / pointers would be appreciated. 

 

Ram
0 Kudos
2 Replies
Altera_Forum
Honored Contributor II
1,148 Views

 

--- Quote Start ---  

Hello All,  

 

I am trying to compile the following code in modelsim and getting "nonresolved signal RX_CH_A has multiple sources. 

 

-- In process 1 for i in 0 to 5 loop RX_CH_A(11 - 2*i) <= PA(6 - i); RX_CH_B(11 - 2*i) <= PB(6 - i); RX_CH_C(11 - 2*i) <= PC(6 - i); RX_CH_D(11 - 2*i) <= PD(6 - i); end loop; -- In process 2 for i in 0 to 5 loop RX_CH_A(10 - 2*i) <= NA(6 - i); RX_CH_B(10 - 2*i) <= NB(6 - i); RX_CH_C(10 - 2*i) <= NC(6 - i); RX_CH_D(10 - 2*i) <= ND(6 - i); end loop;  

 

Since process1 uses odd bits and process2 uses even bits, there should not be a "multiple source" error. 

 

Quartus compiles and synthesises the code just fine. 

 

Only modelsim reports this error. 

 

Any help / pointers would be appreciated. 

 

Ram 

--- Quote End ---  

 

 

try put them in one process. Should have same functionality.
0 Kudos
Altera_Forum
Honored Contributor II
1,148 Views

 

--- Quote Start ---  

try put them in one process. Should have same functionality. 

--- Quote End ---  

 

 

Hi Kaz, 

 

Thanks for quick reply. 

 

I am clocking in the odd bits at rising edge and the even bits at falling edge. That was why I separated them in different processes. 

 

regards. 

 

Ram
0 Kudos
Reply