Modelsim Component instance "xyz" is not bound.

[Altera_Forum]

I am using the latest web version of Quartus and Altera Modelsim. When I load the simulator with my testbench project I get the following warning and non-functioning pll 

# Loading .....# ....# Loading nanolib.nano_clkctrl(altera_rtl)# ** Warning: (vsim-3473) Component instance "U1_clk50 : clk50_pll" is not bound.# Time: 0 ps Iteration: 0 Instance: /nano_top/U1_CC File: ../../ipcores/nanolib/hdl/vhdl/clock_mgmt/nano_clkctrl.vhd# Loading lpm.lpm_common_conversion(body)# Loading lpm.lpm_counter(lpm_syn)  my "failed" architecture looks like so:  testbench[ top[ nano_clkctrl[ clk50_pll( altpll )]]] ... note altpll is the altera IP megacore generated module, all the rest can be viewed as wrappers.  This architecture fails to simulate with above warning. (note this architecture has been verified to work in hardware after compiling in Quartus), so the interfacing is correct or compiling error would have been seen.  However, if I use another testbench which instantiates the "nano_clkctrl" module itself it works, that is to say modelsim can find and simulate the pll without explicitly adding it to the project. Which is what I expect since the altera_mf library is mapped in the modelsim project library structure. So if I load the simulation at top, or testbench if has this issue. If I load simulation at a new testbench or nano_clkctrl it works.   I have ensured the generic and port mapping of the clkctrl module is the same in both project instances, it seems when I "wrap" the clkctrl module one more time from my top level, modelsim can no longer map the design library to the project. But as can be seen, the lpm.lmp is seen, which is also a precompiled altera library at the same library level as the pll. Note the pll is getting instantiated at a lower level of heiarchy from the top level's point of view, lpm is instantiated on the top level and the pll is three more levels down.  Does web version modelsim have a heiarchy level limit????