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Hi,
I am using a single port RAM IP core from my DE1-SoC board having Cyclone V device. I have initialized the RAM contents with a .mif file. The design simulates in qsim, but, when I try to simulate it on ModelSim, no data is read from the .mif file. I tried using the .hex file as well, but the ModelSim still cannot read it, and the output data is all 'xxxxx'. Please help me resolve this problem. Thanka!Link Copied
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how are you using the .mif file? is it part of a component paramters, via an attribute in your HDL or in the assignments editor>?
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--- Quote Start --- how are you using the .mif file? is it part of a component paramters, via an attribute in your HDL or in the assignments editor>? --- Quote End --- I initialized my Single Port RAM IP Core with the .mif file. In the megafunction manager, I specifies the number of words and the size of each work for my RAM, then, initialized its contens with a .mif file. Then used the symbol for the RAM in my .bdf.
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If you're using a BDF, it will need to first convert the .bdf file to an HDL before you can run it in Modelsim. You will need to check if the generated HDL actually contains any reference to the .mif file. Qsim simulates the compiled design (ie a netlist) whereas Modelsim simulates the HDL. For the HDL to include the .mif file, you need to be instantiating the memory core from the altera library.
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