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Hi,
i am looking for limits of modelsim starter edition 10.1b or my understanding . I simulate a little project (PLL + logic function with 2 inputs and 1 outputs) and i don't understand why in simulation i can't find delay between my input and my output that i find in real (hardware, oscilloscope). I use gate level simulation, i have in file .sdc. When i modify delay in file .sdc, i see in oscilloscope and not in simulation. Modelsim starter edition consider my file .sdc? thanksLink Copied
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