- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
I use Synplify Premier for Synthesis and Quartus II v11.1 for place and route. The design uses synthesis directive to infer RAM. When I use the netlist (VQM) for place and route, I get the following critical warning:
Critical Warning (15003): "mixed_port_feed_through_mode" parameter of RAM atom top|sub_module|m_0__ram_block1a_0 cannot have value "old" when different read and write clocks are used.
I understood that the parameter must be set to "don't care". So I tried to use TCL script to modify the parameter assignment. set_parameter -name MIXED_PORT_FEED_THROUGH_MODE DONT_CARE -to "top|sub_module|m_0__ram_block1a_0"
I verified through Assignment Editor that the assignment had been taken but still I get the same critical warning. Am I doing something wrong :confused:?
Link Copied
0 Replies

Reply
Topic Options
- Subscribe to RSS Feed
- Mark Topic as New
- Mark Topic as Read
- Float this Topic for Current User
- Bookmark
- Subscribe
- Printer Friendly Page