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Multiprocessor in EPCS

Altera_Forum
Honored Contributor II
‎06-10-2010 05:30 PM
1,236 Views

Hello, 

 

I'm using a system with 2 Nios II and I'd like to put the whole system (including the software of the 2 Nios) in flash memory (EPCS). 

 

My EPCS starts at 0x11800 and ends at 0x11FFF. 

My SDRAM starts at 0x02 and ends at 0x03FFFFFF. 

 

When I use Nios II IDE (v9.0) to program the processors, I use the SDRAM for reset address and vectors address as following : 

CPU 0 reset : 0x02000000 

CPU 0 vectors : 0x02000020 

CPU 1 reset : 0x02100000 

CPU 1 vectors : 0x02100020 

 

Now, I'd like to have the processors booting from the EPCS, so I changed the reset address of the CPU 0 to 0x11800 which is the base of my EPCS, but I don't know which address use for the CPU 1 reset address. Can I use 0x11820 (which is just after the reset address of CPU 0) or should I use something else ? 

 

I can't keep the same memory range as for SDRAM due to their non identical size. 

 

Thanks in advance, 

Yorick
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Altera_Forum
Honored Contributor II
‎06-10-2010 06:15 PM
490 Views

take a look here: 

 

http://www.alteraforum.com/forum/showthread.php?t=19839
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Altera_Forum
Honored Contributor II
‎06-10-2010 06:50 PM
490 Views

Thanks ! 

I must not have search correctly.
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Altera_Forum
Honored Contributor II
‎06-10-2010 07:02 PM
490 Views

ah, i tend to go to Altera's website and search there, sometimes adding site:alteraforum.com if i want to see just forum results. what i searched for was multiple nios epcs.

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