Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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OpenCL BSP Design

Honored Contributor II

Does anyone has experience designing BSP? 


I have a A10 board without BSP, and it have 2 DDR4 memory, 

so I try to follow opencl dsp design tutorial to design a bsp, 

I copied a10_ref, and named it my_board, 

however, a10_ref has only 1 DDR memory, and the device and pin planner doesn't fit to my board, 

I first modified device in device.tcl from 10AX115S2F45I1SG to 10AX115N3F40E2SG, and also modified pin in flat.qsf. 

then I open board.qsys, acl_ddr4_a10.qsys, acl_ddr4_a10_core.qsys and click "sync all system info" to upadte device in .qsys file. 

then I generate HDL, 

then I run base compile with export ACL_QSH_COMPILE_CMD="quartus_sh –-flow compile top -c base" and compile

however, I keep getting this error 


Info: Command: quartus_syn --read_settings_files=off --write_settings_files=off top -c base 

Info: Using INI file /root/intelFPGA_pro/17.0/hld/board/custom_platform_toolkit/tests/boardtest/boardtest/quartus.ini 

Info: qis_default_flow_script.tcl version:# 1 

Info: Initializing Synthesis... 

Info: Project = "top" 

Info: Revision = "base" 

Info: Analyzing source files 

Error (18185): Your design contains IP components that must be regenerated. To regenerate your IP, use the Upgrade IP Components dialog box, available on the Project menu in the Quartus Prime software 

Error (18186): You must upgrade the IP component instantiated in file ip/board/board_kernel_clk_gen.ip to the latest version of the IP component. 

Error (18186): You must upgrade the IP component instantiated in file ip/board/board_pcie.ip to the latest version of the IP component. 

Error: Flow failed: ERROR: Current design not found
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