Pins not connecting in Quartus

[Altera_Forum]

Excuse the ignorance but this is my first time dealing with Quartus. I have followed my text's instructions word for word and rebuilt circuits and subcircuits numerous times and each time I go to run the simulation tool I get the following warnings: I am at my wits end.  

 warning: no exact pin location assignment(s) for 5 pins of 5 total pins  info: pin x0 not assigned to an exact location on the device  info: pin a0 not assigned to an exact location on the device  info: pin a2 not assigned to an exact location on the device  info: pin a1 not assigned to an exact location on the device  info: pin a3 not assigned to an exact location on the device warning: some pins have incomplete i/o assignments. refer to the i/o assignment warnings report for details warning: found 1 output pins without output pin load capacitance assignment  info: pin "x0" has no specified output pin load capacitance -- assuming default load capacitance of 0 pf for timing analysis warning: the reserve all unused pins setting has not been specified, and will default to 'as output driving ground'.   

[Altera_Forum]

Hi, 

the above messages sound like being generated by QII during compilation. While you have not given any link nor have posted the instructions, I cannot image what might have gone wrong. Thus I might just repeat the instructions when telling you to assgin the signals in the Pin Planner (CTRL+Shift+N)... Be sure to save the assignments when closing the Pin Planner before starting a new compilation

[Altera_Forum]

Did you assign the X and A signals to specific pins? It's just an information that you might have forgotten to do so. 

If you are simulating the design, simply ignore the warnings, If you are going to run the design on a specific hardware, e.g. a development port, you should know which pins have to be connected.