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Please help - Ignored assignments: fast output register

Altera_Forum
Honored Contributor II
2,656 Views

Hi, 

in the module the register is defined with 

/* synthesis ALTERA_ATTRIBUTE = "FAST_OUTPUT_REGISTER=ON" */ 

 

I connect it to the output pin through several direct assignments within the module hierarchy. 

Why this warning appears? What else should I do to have fitter place the register as expected?
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Altera_Forum
Honored Contributor II
1,018 Views

Either you have no register assigned in the path to pin, or your assignment is misplaced or you are using a DDRIO which by default uses io register.

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Altera_Forum
Honored Contributor II
1,018 Views

 

--- Quote Start ---  

Either you have no register assigned in the path to pin 

--- Quote End ---  

 

I have the same problem because of no register assigned in the datapath to output pins. 

Please remind me, what kind of register is meant to be used in this case for synchronous design?  

LPM_DFF, LPM_FF, LPM_TFF or LPM_LATCH ?
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Altera_Forum
Honored Contributor II
1,018 Views

 

--- Quote Start ---  

I have the same problem because of no register assigned in the datapath to output pins. 

Please remind me, what kind of register is meant to be used in this case for synchronous design?  

LPM_DFF, LPM_FF, LPM_TFF or LPM_LATCH ? 

--- Quote End ---  

 

 

LPM_DFF. 

or just use assignment on clock edge and that should infer a D register.
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