- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi,
in the module the register is defined with /* synthesis ALTERA_ATTRIBUTE = "FAST_OUTPUT_REGISTER=ON" */ I connect it to the output pin through several direct assignments within the module hierarchy. Why this warning appears? What else should I do to have fitter place the register as expected?Link Copied
3 Replies
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Either you have no register assigned in the path to pin, or your assignment is misplaced or you are using a DDRIO which by default uses io register.
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
--- Quote Start --- Either you have no register assigned in the path to pin --- Quote End --- I have the same problem because of no register assigned in the datapath to output pins. Please remind me, what kind of register is meant to be used in this case for synchronous design? LPM_DFF, LPM_FF, LPM_TFF or LPM_LATCH ?
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
--- Quote Start --- I have the same problem because of no register assigned in the datapath to output pins. Please remind me, what kind of register is meant to be used in this case for synchronous design? LPM_DFF, LPM_FF, LPM_TFF or LPM_LATCH ? --- Quote End --- LPM_DFF. or just use assignment on clock edge and that should infer a D register.

Reply
Topic Options
- Subscribe to RSS Feed
- Mark Topic as New
- Mark Topic as Read
- Float this Topic for Current User
- Bookmark
- Subscribe
- Printer Friendly Page