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I am currently checking the specs of maxv and max10 in order to select a new FPGA.
I synthesized the above devices with the same design and checked the power consumption,
and found a large difference.
The details are as follows, but I am contacting you to ask why there is such a large difference in the power consumption values. Thank you in advance.
device1 (max10)
+-----------------------------------------------------------------------------------
; Power Analyzer Summary
+-----------------------------------------------------------------------------------
; Quartus Prime Version ; 23.1std.1 Build 993 05/14/2024 SC Standard Edition
; Family ; MAX 10
; Device ; 10M02SCU169C8G
; Total Thermal Power Dissipation ; 117.84 mW
; Core Dynamic Thermal Power Dissipation ; 0.00 mW
; Core Static Thermal Power Dissipation ; 66.82 mW
+---------------------------------------------------------------------------------------------+
; Fitter Summary
+---------------------------------------+----------------------------------------------------+
; Quartus Prime Version ; 23.1std.1 Build 993 05/14/2024 SC Standard Edition;
; Family ; MAX 10
; Device ; 10M02SCU169C8G
; Total logic elements ; 916 / 2,304 ( 40 % )
; Total combinational functions ; 907 / 2,304 ( 39 % )
; Dedicated logic registers ; 274 / 2,304 ( 12 % )
; Total registers ; 274
; Total pins ; 108 / 130 ( 83 % )
; Total virtual pins ; 0
; Total memory bits ; 0 / 110,592 ( 0 % )
; Embedded Multiplier 9-bit elements ; 0 / 32 ( 0 % )
; Total PLLs ; 0 / 1 ( 0 % )
; UFM blocks ; 0 / 1 ( 0 % )
; ADC blocks ; 0
+---------------------------------------+----------------------------------------------------+
device2 (maxV)
+---------------------------------------------------------------------------------------
; Power Analyzer Summary
+-------------------------------------------------------------------------------------
; Quartus Prime Version ; 23.1std.1 Build 993 05/14/2024 SC Standard Edition
; Family ; MAX V
; Device ; 5M1270ZT144C5
; Total Thermal Power Dissipation ; 3.80 mW
; Core Dynamic Thermal Power Dissipation ; 0.00 mW
; Core Static Thermal Power Dissipation ; 3.08 mW
; I/O Thermal Power Dissipation ; 0.72 mW
+----------------------------------------------------------------------------+
; Fitter Summary
+-----------------------+----------------------------------------------------+
; Quartus Prime Version ; 23.1std.1 Build 993 05/14/2024 SC Standard Edition;
; Family ; MAX V
; Device ; 5M1270ZT144C5
; Total logic elements ; 846 / 1,270 ( 67 % )
; Total pins ; 108 / 114 ( 95 % )
; Total virtual pins ; 0
; UFM blocks ; 0 / 1 ( 0 % )
; Total registers ; 274 / 1,270 ( 22 % )
; Global signals ; 4
; -- Global clocks ; 4 / 4 ( 100 % )
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Hello,
Good day
Thank you for reaching out. I'm Nazrul Naim looking into your issue and allow me some time to look into your issue. I shall come back to you with findings.
Thank you for your patience.
Best Regards,
Nazrul Naim
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Hello,
For your information there is a large difference between the 2 devices is because MAX V architecture provide the MultiTrack interconnect which is designed to maximize performance and minimize power by using the most efficient, direct connection from input to logic to output. For more information regarding MAX V datasheet. You can access the link below.
Link : https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/max-v/mv51001.pdf
Hop that helps.
Best regards,
Nazrul Naim
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Hello,
As we do not receive any response from you on the previous question/reply/answer that we have provided. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.
Best regards,
Nazrul Naim

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