I'm a new learner,when I programing my first programe, I have a problem``` Maxplus2 said that "can't find design file adder"
My programing is simple, it's a fulladder, the programing is:
--*******************************
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
--**********************************
ENTITY FULLADDER IS
PORT(
A,B :IN STD_LOGIC_VECTOR(3 DOWNTO 0);
C :INOUT STD_LOGIC_VECTOR(4 DOWNTO 0);
S :OUT STD_LOGIC_VECTOR(3 DOWNTO 0)
);
END FULLADDER;
--**********************************
ARCHITECTURE A OF FULLADDER IS
COMPONENT ADDER
PORT(
A :IN STD_LOGIC;
B :IN STD_LOGIC;
C :IN STD_LOGIC;
CA :OUT STD_LOGIC;
SUM :OUT STD_LOGIC
);
END COMPONENT;
BEGIN
U0:ADDER PORT MAP(A(0),B(0),C(0),C(1),S(0));
U1:ADDER PORT MAP(A(1),B(1),C(1),C(2),S(1));
U2:ADDER PORT MAP(A(2),B(2),C(2),C(3),S(2));
U3:ADDER PORT MAP(A(3),B(3),C(3),C(4),S(3));
C(0)<='0';
END A;
Hoping someone could help me.
