Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
17254 Discussions

Problem with JTAG configuration over USB-Blaster Rev.C with VCCTRGT=2.5V

Altera_Forum
Honored Contributor II
1,225 Views

On my board JTAG configuration over USB-Blaster Rev.C with VCCTRGT=2.5V is very unstable, almost always is fails with "CONFIG_DONE failed to go high" error. But if I make VCCTRGT=3.0V then everything works perfect. USB-Blaster Rev.C uses NXP 74LVC244A as a buffer for JTAG signals which makes it way more stable comparing to Rev.A and Rev.B that use just an open-drain level translator with internal 10kOhm pull-ups and a single-shot circuitry. Did anyone have any problems with such setup and VCCTRGT=2.5V ?

0 Kudos
2 Replies
Altera_Forum
Honored Contributor II
447 Views

Most JTAG programming problems occuring with particularly adapters are caused by a combination of specific adapter behaviour and signal quality issues of the respective board. Distorted TCK, e.g. with slightly ringing edges is the favourite candidate. 

 

Small changes to the board hardware can often fix the issues, e.g. a small parallel capacitor (5 - 10 pF) at TCK near the FPGA, series termination of TCK at the JTAG connector. The signal quality problems should reveal when probing the JTAG signals with active high impedance probes.
0 Kudos
Altera_Forum
Honored Contributor II
447 Views

That's correct and to be checked, but real personal examples would be the most useful.

0 Kudos
Reply