Programing 5M80ZE64C5N MAX V CPLD

[Altera_Forum]

Hi, 

 I'm getting this error when I try to program the 5M80ZE64C5N MAX V CPLD:  Info: Started Programmer operation at ... Info: Device 1 contains JTAG ID code 0x020A50DD Error: Can't recognize silicon ID for device 1 Error: Operation failed Info: Ended Programmer operation at ...  In the "Device" I choose 5M80ZE64C5 since the ...C5N isn't an option. Nevertheless, in the "MAX V Device Handbook", "Chapter 6: JTAG and In-System Programmability in MAX V Devices" w w w.altera.com/literature/hb/max-v/mv51006.pdf, in Table 6–3. 32-Bit IDCODE for MAX V Devices, it is stated that the HEX IDCODE for the 5M80Z devices is 0x020A50DD.  I have no clue of what I can do to solve this.  Kind regards Pedro Ferreira

[Altera_Forum]

--- Quote Start ---   The problem is that the actual PCB wasn't designed to have the supply for the Bank2, so I had to do some magic in soldering to put a decoupling cap in the two supply pins of the IC (EQFP) and above the cap I solder the the wire to supply the voltage. Its not how it should be but as this is a prototype of the final board, I have to manage something.   --- Quote End ---   Don't feel bad about the design mistake. Keep in mind that when you fix something that initially does not work, you usually end up with a much better understanding. For example, you will now always read an FPGA data sheet with an unconscious eye towards whether all banks need to be powered, even if they are unused.    --- Quote Start ---   The finger is on the pins, because I put the decoupling capacitor and the wire for supply, and isolated with hot glue.   --- Quote End ---  Then it sounds like the programming issue is mostly related to power, and can be ignored for now, since you have already identified that as a problem.  Cheers, Dave