Qsys address map granularity

[Altera_Forum]

What is the unit granularity is for the address range shown in Qsys address map?  

 I have instantiated a generic_tristate_controller and tristate_conduit_bridge to interface an external Cypress SRAM (part number is CY62146EV30). The SRAM is a 512kByte memory with a 16-bit data bus, so it has 18 address lines.   In the Qsys System Contents and Address Map tabs, this memory is shown with a base address of 0x00000 and end address of 0x3ffff. This is only 262144 of address reach.   I was expecting Qsys to report the end address in Bytes, which would be 524287, or 0x7ffff but it only reports half of this. Instead it looks to me like it is reporting addresses in words.   I also have several internal memories which are 32-bits wide. The address map reports an address reach in Bytes for these, not words. For example a 16kByte tightly coupled memory has an address reach of 0x3fff which is 16383.   So from this it looks to me like Qsys is using different address units for internal and external memories.   I would like to understand why the address map does not match what is intended for the external memory.  Thanks, -phil

[Altera_Forum]

Qsys generates address maps based on the width of the address signal/port at each component on avalon. The addressing scheme is to route RD/WR transactions around the bus to the right peripheral, which is nothing more than muxing to the correct set of physical address lines. 

 The 18 address lines to the SRAM can access 2^18 or 262144 locations, each location being 16bits wide; hence the 512kByte memory space.