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Quartus II 9.0 build 235; Parameter settings problem

Altera_Forum
Honored Contributor II
‎12-10-2009 04:00 PM
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Hi All, 

 

I encountered with a wiered problem. When one of my verilog modules was not sysnthesized as State machine by Quartus, I checked the parameters settings created by Quartus for the State machine parametes.  

 

 

pic1: ControllerParameters -> Verilog module parameters 

pic2: ControllerParameterSettings -> Parametes set by Quartus 

 

Any ideas on how to fix this??  

 

Thanks in advance, 

Trinath
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Altera_Forum
Honored Contributor II
‎12-10-2009 07:40 PM
348 Views

Got resolved!!!  

 

Overwritten parameter settings manually on block diagram. 

 

Wishes, 

Trinath
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