Quartus II 9.1 changes inference rules for altsyncram

Altera_Forum · ‎11-08-2009

Hi folks,

I may have found an interesting "feature" that appeared in Quartus II 9.1: a VHDL constant ROM is not inferred as an altasyncram if its size is not a power of 2.

This is not the case using Quartus II 9.0 SP2.

For example:

library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
entity main_roms is
 port (
   addr : in  unsigned(13 downto 0);
   clk  : in  std_logic;
   dout : out unsigned(7 downto 0));
end main_roms;
architecture rtl of main_roms is
  type rom_array is array(0 to 12287) of unsigned(7 downto 0);
  constant ROM : rom_array := (
     X"00", X"00", X"00", X"00", X"00", X"00", X"00", X"00",
...
     X"83", X"7f", X"5d", X"cc", X"b5", X"fc", X"17", X"17",
     X"f5", X"03", X"fb", X"03", X"62", X"fa", X"59", X"ff");
begin
process (clk)
  begin
    if rising_edge(clk) then
      dout <= ROM(TO_INTEGER(addr));
    end if;
  end process;
end rtl;

This 12 kbyte table is not recognized, but it is, if you just add 4 kbytes of data and change its upper index from 12287 to 16383 :eek:.

It took me 1 day to figure this out! My design exploded from 5k gates to 15k gates just for this reason.

Michel

Altera_Forum · ‎11-08-2009

Did you try to set RAM style explicitely by synthesis attributes or global settings? Anyway, it sounds like a bug.

Altera_Forum · ‎11-08-2009

No, I have just a few deviations from standard settings, and nothing related to RAM style.

The same project still works under 9.0 SP2. I guess I will have to pad my ROM to 16k or slice it into 3 x 4k blocks if I don't want to declare it explicitely?

Altera_Forum · ‎11-08-2009

I wondered, if it's possible to enforce RAM inference by explicite settings. I didn't yet install V9.1, so I can't test myself.

Altera_Forum · ‎11-08-2009

I have seen a setting to enforce RAM inference for small sizes, but that's all.

What lead me to think about the power of 2 limitation is that in 9.1, the MegaWizard just propose you a drop-down list of sizes, instead of letting you enter the memory size as before.

Altera_Forum · ‎11-09-2009

I didn't try QII 9.1 yet, but I noted in the docs that 9.1 introduces smart resource aware RAM/ROM inference. I would suspect that bug or not, your issue might be possibly related to this. I might be a good idea to try disabling this new feature and and see if it makes any difference.

Altera_Forum · ‎11-09-2009

You could also try to force the ram type with a vhdl attribute

attribute ramstyle : string;

attribute ramstyle of ROM : signal is "M4K";

and see what happens.

BTW: I also continue to use Quartus 9.0 SP2 as 9.1 does not work correct for my project. The fitter starts and runs forever without producing any result. That doesn't really match up the 20% performance gain promised :D

Best wishes, Alex