Quartus II - Setting Global Clock Input (MAXII)

[Altera_Forum]

Hello, 

 I am doing a design with an Altera part (EMP240T100I5) using Quartus II. I'm pretty inexperienced with the architecture and software, but have learned enough to have been able to get a few designs programmed and running. I have been using the internal oscillator up to now, but this new design requires using a global clock input.  I thought implementing a global clock input would be relatively straightforward, but have been pulling my hair out on how exactly this is done.  I've searched around a lot, and am now more confused than ever. Some of the resources seem to imply that the TimeQuest Analyzer is used for this purposes, but to me this seems more about giving the software data for timing analysis and less about actually implementing the clock.  Other resources said to "set that pin as *global*", but I have not been able to find out where this might be done in the GUI. (Yet other resources seemed to explain how to do it via command line, but I'm more comfortable with the GUI - I figure the GUI should be able to handle this.)  Yet other resources explain how to set an internally generated signal to a global net.  All the information I find seems to be either overly complex (for my knowledge level on the subject) or else only tangentially applicable to my query (with advanced descriptions meant to generalize the process at the expense of clarity).   All I want to do is tell the software that pin 12 (GCLK0), named "CLK", is a global clock input. (And also where to specify the timing constraints based on this selection.)  Does anybody know of any resources that break this process down into simple steps?  Additional Information:   - Software: Quartus II 12.1 SP 1.33 (32 bit)  - Device: EPM240T100I5N (MAXII)  - Computer: Windows XP (SP3)  - Language: VHDL (1993)   Thank you.

[Altera_Forum]

1) There are pins that drive global clocks directly. That is just a location constraint. (The Chip Planner is probably the best place to find those pins). If you don't do this, it will drive local routing to get to the global. 

2) Quartus promotes signals to global automatically. If you have a clock and use it as a clock and it's the only one in your design, there's a 99% chance it's already on one. Open the Compilatin Report -> Fitter -> Resource Section -> Global & Other Fast Signals and I'll be you find it there. 3) If you want to make the assignment, open the Assignment Editor, put Clk in the To column, Global Signal for assignment and set it to Global. Compile and repeat 2), but if it's not automatically done in 2) then there's probably a reason this won't work.

[Altera_Forum]

The MAX II devices have global clock inputs pre-assigned. What you need to do is make sure your external global clock signal connects to that pin, i.e., in your case assigning CLK to GCLK0 (pin 12) is sufficient. 

 The Cyclone Handbook page has links to the pin configurations guidelines. Read through that and it explains the pin functions.  Cheers, Dave

[Altera_Forum]

--- Quote Start ---  2) Quartus promotes signals to global automatically. If you have a clock and use it as a clock and it's the only one in your design, there's a 99% chance it's already on one. Open the Compilatin Report -> Fitter -> Resource Section -> Global & Other Fast Signals and I'll be you find it there.  --- Quote End ---    That was it! I recall briefly wondering if this process might be automatic, but the thought must have slipped away. Turns out that was the answer. Thanks also for showing me where to go to confirm this.  Thank you both for your time and assistance.