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Hi,
I've done a lot of FSM's, but today I can't make Quartus recognize mine as a FSM. The State Machine Viewer gives me a blank page. I know it's not completed. There's missing the combinational always that sets the signals. But as far as I know, it should give me the FSM "draw". Don't care with the signals not being assigned. Here's my code.
module CONTROL
# (parameter integer DATA_WIDTH = 16)
(
//Inputs
input wire clk ,
input wire rst ,
input wire start ,
input wire div0 ,
input wire lt0 ,
//Outputs
output reg enC ,
output reg enA ,
output reg enB ,
output reg rstC ,
output reg done ,
output reg newA
);
localparam IDLE = 1'b0 ,
MAIN = 1'b1 ;
reg STATE ,
NEXT_STATE ;
always @ (posedge clk, posedge rst)
begin
if (rst)
STATE <= IDLE;
else
STATE <= NEXT_STATE;
end
always @ (*)
begin
NEXT_STATE = STATE; //default
case (STATE)
IDLE: if (start)
NEXT_STATE = MAIN;
MAIN: if (div0 == 1'b1 || lt0 == 1'b1)
NEXT_STATE = IDLE;
endcase
end
endmodule
Hope someone can help me. Thank You!
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Hi Rafael,
I tried your code with following change. I used reg [ 1:0] STATE, NEXT_STATE; instead of reg STATE.NEXT_STATE; Means I declared them with width set to 2. Now Quartus detects FSM. Sorry but I do not know why this happens. Regards, Bhaumik
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