Quartus Prime on Intel DevCloud: No hardware detected in Quartus programmer

[agond2]

I am trying to compile and run the open source FFT IP core https://www.spiral.net/hardware/dftgen.html

The FFT IP core compiles on quartus without any errors during compilation, fitter, timing placement and routing. When I open the programmer to run the code on hardware, I don't see any hardware. The FPGA on the node is Arria 10, 10AX115S2F45I2SGES, dcp_bsp:pac_a10

Am I missing anything here?

Thanks

[Kenny_Tan]

Yes, For open CL, we dont use programmer to do programming.

We use makefiles, e.g. make hw -f Makefile.fpga 

You may find the details in https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/opencl-sdk/aocl_programming_guide.pdf 105.

If you are not working on open CL, you can refer to https://github.com/intel/FPGA-Devcloud/tree/master/main/Devcloud_Access_Instructions#54-submitting-batch-jobs -> 10.0 Compiling on the Devcloud and Downloading to a Local PC connected DE10-Lite board

[EricMunYew_C_Intel]

We do not receive any response from you to the previous question/reply/answer that I have provided. Please post a response in the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you with your follow-up questions.

[EricMunYew_C_Intel]

We do not receive any response from you to the previous question/reply/answer that I have provided. Please post a response in the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you with your follow-up questions. Thank you.