[Quartus] RTL viewer logic gates

[Altera_Forum]

Hello, 

There is an option to see the basic logic gates and elements in RTL viewer? such as or, nor, and gates used in design?  thanks

[Altera_Forum]

--- Quote Start ---  Hello, There is an option to see the basic logic gates and elements in RTL viewer? such as or, nor, and gates used in design?  thanks  --- Quote End ---    The RTL view is a higher level of abstraction from the gates. To see these, you need the technology map viewer.

[Altera_Forum]

--- Quote Start ---  The RTL view is a higher level of abstraction from the gates. To see these, you need the technology map viewer.  --- Quote End ---    Do you mean the post-map tech map viewer, because the post-fit tech map viewer will not show this. The whole point of the tech map viewer is to show FPGA resources used to implement the design, not logic gates. The RTL viewer used to show logic gates and Karnaugh maps for logic functions, but I don't think it does that anymore. I haven't seen them in there in years.

[Altera_Forum]

--- Quote Start ---  Do you mean the post-map tech map viewer, because the post-fit tech map viewer will not show this. The whole point of the tech map viewer is to show FPGA resources used to implement the design, not logic gates. The RTL viewer used to show logic gates and Karnaugh maps for logic functions, but I don't think it does that anymore. I haven't seen them in there in years.  --- Quote End ---    You can see the gates implemented into each LUT by expanding it in the viewer.