Quartus feature request

[Altera_Forum]

Dear Altera, 

In the next version of Quartus I would like to request support for Module-Based partial-reconfiguration of the FPGA. I.e. the ability to reconfigure a portion of the FPGA while the remainder of the design is still operational.   An external microprocessor should be able to supply the FPGA (in Passive Serial mode) with a bitstream that reconfigures a pre-determined area of the floorplan with a new configuration. Module-based Partial Reconfiguration is applicable when communication is needed between modules. For modules that communicate with each other, a special bus macro is required to allow signals to cross over a Partial Reconfiguration boundary.   I have a (commercially sensitive) application for this and whilst this is now possible to do with Xilinx FPGAs, I prefer to do business with Altera. However, Altera have not added this capability to Quartus yet.   Regards, Kind Regards, EurIng Nicholas Lee BSc(Hons) CEng MIET MInstMC   Lee Technology Limited: A company registered in England and Wales (No. 07077321) Registered Office: 14 Ash Crescent, Salisbury, Wiltshire SP1 3GY

[Altera_Forum]

Besides necessary support in Quartus tool partial reconfiguration first of all has hardware prerequisites. Altera knowledge base clearly states lack if it with present devices:  

http://www.altera.com/support/kdb/solutions/rd11192009_959.html I don't know, if this is the whole truth. Newer devices may be prepared for PR, if there's a custormer demand, that can't be denied.

[Altera_Forum]

I couldn't say anything before because of NDA but now they've made an announcement. You're getting your wish: 

 http://www.altera.com/b/innovating-at-28-nm.html  Jake

[Altera_Forum]

Impressive indeed. But more than one step beyond the scope of typical commercial FPGA projects, I fear.