Rapid compilation ignores post-fitting netlists and recompiles everything again

[Altera_Forum]

Hi! I am currently working with Cyclone V SoC and compilation time of my project is about 8 min long. My design includes HPS and some simple entities (7 segment driver for example). As I make some changes in mentioned entities I don't want to recompile my whole design. I have assigned partitions and selected post synthesis netlist, also I have selected option for forcing compiler to use post fitting netlist despite changes in the source code. Whatever I have tried with this options didn't gave me any time reduction in compilation time.

[Altera_Forum]

If you only have "some simple entities" and you're making changes "in mentioned entities", Quartus is going to have to recompile them. 

 However, 8 minutes doesn't sound like very long to me. Even the smallest parts take 3-4 minutes on a quick machine. So, I'm not sure what sort of reduction in time you're hoping for.  When your compile time are nearer, or over, an hour then partitioning can come into its own.  Cheers, Alex

[Altera_Forum]

--- Quote Start ---  If you only have "some simple entities" and you're making changes "in mentioned entities", Quartus is going to have to recompile them.  However, 8 minutes doesn't sound like very long to me. Even the smallest parts take 3-4 minutes on a quick machine. So, I'm not sure what sort of reduction in time you're hoping for.  When your compile time are nearer, or over, an hour then partitioning can come into its own.  Cheers, Alex  --- Quote End ---    I was hoping that Quartus won't recompile my whole design if I make changes in one of the partitions and that Quartus will use post-fit netlists of unchanged partitions. Despite that my compilation time stays same as the first time when I have compiled my design.