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I would like to start by saying I know this is Quartus 2 not Prime because my college uses 2. I did not see a form for 2 but need some help. we are basically restricted to using 74192 for the countdown timer. Everything in the circuit works fine except for the 50-second counter counting from 50 to 10 seconds in conjunction with the timer counting from 9 to 1.
In this sense when the 50-second timer hits 0 and instead of carrying in to continue it stops at 0 and the minute timer takes the role of the 50 second causing the 50-minute to take the role of the 1-minute timer
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Why are you restricted to use 74192 counter? That's an old fashioned and awkward way to design logic circuits. Is it a homework exercise?
An appropriate way to design the circuit would be a behavioral description in VHDL or Verilog.
The error is that ten minute and second counter must be set to 5 rather than 0 when down-counting to 9.
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In relation to the set 5 how would you recommend this?
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Hi @Fall3n,
Good to know that you have found the answers to your question, with no further clarification on this thread, it will be transitioned to community support for further help on doubts in this thread. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support.
Thank you for the questions and as always pleasure having you here.
Best Wishes
BB

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