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SOPC PLL module waring

Altera_Forum
榮譽貢獻者 II
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Everybody, I use SOPC Builder to generate the altpll, but the builder show this warning and not generate the Altera's IP, name is "xxx.qip" and Quartus compilter the nios's ip show the message, 

"Error (10130): Verilog HDL error at altpll.v(221): parameter "clk0_divide_by" is not a formal parameter of instantiated module" 

 

and sopc builder show the "Warning : Warning: Entity "altpll" obtained from"/users/johnny/documents/quartus/de2_70/altpll.v" instead of Quartus II megafunction library" 

 

who can help solve this problem? 

many thanks
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Altera_Forum
榮譽貢獻者 II
618 檢視

I'm having the same issue. Anyone have a solution? 

 

Running Quartus 10.0 on XP SP3. The altpll was instantiated as part of the SOPC builder and I instantiated it in my main Verilog file, which was created through the DE3 System Builder. 

 

-Jason
Altera_Forum
榮譽貢獻者 II
618 檢視

i am able to add an Avalon ALTPLL to my SOPC Builder system and do a full compile (QII 10.0). can you provide some more information (target device, PLL settings)

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