SOPC generate a lot of clock and burst

[Altera_Forum]

I'm doing some work at sopc, when generate , a lot of useless clock and burst program was generated and maybe cost much more ALUTs,that makes me trouble. how can I delete it. 

the generate sentence is :  Running Generator Program for [project name]_clock_0 Running Generator Program for [project name]_clock_1 ...................................................................and so on Running Generator Program for [project name]_burst_0 Running Generator Program for [project name]_burst_1 ...................................................................and so on

[Altera_Forum]

Hi, 

I don't think they are useless. AFAIK the clock modules are generated when you are using different clocks in your sopc builder design. I think they are needed for the clock domain crossing. The burst modules are generated when you enable cache bursting (Nios processor -> caches and memory Interfaces tab). There will be one burst module for each connection between the data/instruction master and a component. You can avoid this by disabling cache bursting. But if you are using SDRAM/DDRx you will probably see a performance penalty.

[Altera_Forum]

I've solved this problem, it's my fault, selected the wrong clock 

thank u all the same~