SOPC question - VHDL array support

[Altera_Forum]

Hi everyone, 

 I've got a question regarding SOPC builder. I want to design my own IP component (nothing too fancy, just standard R/W registers and some FIFOs, etc.). I was wondering, in the IP component editor we have the "conduit_end" interface that allows us to output signals, can these signals be VHDL arrays or records?   Best regards  Benjamin

[Altera_Forum]

No I think only std_logic and std_logic_vector are supported. 

As Quartus / SOPC builder supports both VHDL and Verilog there are lots of restrictions on the signal types you can use. You will probably need to put everything in a big std_logic_vector (or distribute on several signals) and remap to a record or array in your code.