Intel® Quartus® Prime Software
Intel® Quartus® Prime Design Software, Design Entry, Synthesis, Simulation, Verification, Timing Analysis, System Design (Platform Designer, formerly Qsys)
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Saving place-and-route results of Logic Lock regions in design

allenS1
員工
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I have a design that utilizes Design partitions with Logic Lock regions to separate the placement of design components on the device. I want to lock the place and route results of the fitter so that they will not change after subsequent compilations. I tried to do this by setting the Fitter Preservation Level of the design partitions to "final", but I'm getting a warning that's saying changing the Fitter Preservation Level doesn't work in DNI mode. The warning says the following:

 

Use of PRESERVE assignment on instance "inst[0].****" is ignored in DNI compilation mode.

 

Is there a way around this warning so that I'm able to save the place-and-route results?

 

Allen

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SyafieqS
員工
931 檢視

Do you small design to replicate?


allenS1
員工
795 檢視

Hi there. Sorry for the delayed response. Here is an example design that replicates the warning I'm receiving when setting the preservation level to "final" for the design partitions.

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